• The key feature of the project is two new fabs in Taylor that will produce processors using two- and four-nanometer manufacturing technologies.
  • In addition to the two processor factories, the Taylor complex will also include a research and development fab.

Recently, the U.S. Commerce Department announced it will allocate federal funds to Samsung Electronics Co. Ltd. for the construction of a semiconductor complex in Taylor, Texas. Samsung has secured USD 6.4 billion in CHIPS Act funding for this project.

The overall cost of the project is anticipated to surpass USD 40 billion. In Taylor, Samsung intends to construct three fabrication plants and a chip packaging facility. Additionally, the company will allocate some of the funds to enhance its existing semiconductor plants in the nearby city of Austin.

“I signed the CHIPS and Science Act to restore U.S. leadership in semiconductor manufacturing and ensure America’s consumers, businesses, and military maintain access to the chips that underpin our modern technology. This announcement will unleash over $40 billion in investment from Samsung, and cement central Texas’s role as a state-of-the-art semiconductor ecosystem,” said President Joe Biden.

The centerpiece of the project involves two new fabs in Taylor that will manufacture processors using cutting-edge two- and four-nanometer technologies. Samsung’s four-nanometer node began mass production in 2021, while its two-nanometer technology is slated to launch next year.

Samsung reportedly plans first to produce two-nanometer chips designed for mobile devices. By 2026, the company aims to introduce an advanced version of this node for manufacturing chips suited to high-performance computing settings, including cloud data centers. In 2027, Samsung intends to begin production of two-nanometer processors for automotive applications.

In addition to the two processor factories, the Taylor complex will also feature a research and development fab. This facility will aid Samsung in improving its manufacturing techniques, an initiative that will ultimately lead the company to develop technologies beyond the two-nanometer scale.

Samsung anticipates introducing a 1.4-nanometer process in 2027. This technology is expected to include an advanced version of the gate-all-around (GAA) transistor design, which is a key feature of the company’s most recent chips.

Transistors use a structure known as a channel to transfer electricity between their internal parts. In Samsung’s GAA design, this channel consists of three nanosheets layered on top of each other. It is reported that Samsung’s 1.4-nanometer process will increase the number of nanosheets in each transistor to four, which is expected to enhance performance and decrease power consumption.

The three fabs in Taylor will work in conjunction with a facility focused on producing 2.5D packaging components. These components are used to connect multiple semiconductor modules into a single product. For instance, Nvidia Corp. employs such packaging to integrate the computing and memory modules on its graphics cards.

The 2.5D packaging to be manufactured at Samsung’s planned facility connects semiconductor modules by arranging them side-by-side on a common base layer. This base layer, known as an interposer, contains miniature wires that facilitate data transfer between the modules mounted on it. Certain interposers are also equipped with networking circuits that enhance the speed of data movement.

In addition to the investment announced recently, Samsung plans to upgrade its current semiconductor facilities in Austin. This initiative will concentrate on improving the company’s capability to manufacture chips using so-called FD-SOI technology.

In an FD-SOI chip, transistors consist of an insulating material layer placed between two silicon layers. These transistors manage electricity more efficiently than those based on designs like the GAA architecture. Moreover, they require less power and are easier to manufacture.

FD-SOI technology is commonly employed in the production of wireless networking chips and other circuits that require high levels of power efficiency. According to the Commerce Department, Samsung’s FD-SOI facilities in Austin will manufacture chips crucial for key U.S. industries, including aerospace, defense, and automotive sectors. The company has also reportedly made several commitments to produce chips for the U.S. Defense Department at the Austin facility.

Across all the facilities Samsung plans to construct or enhance, the investment is projected to generate 21,500 jobs. The company will allocate USD 40 million of the federal funding it received recently towards workforce development initiatives, including training programs.

The funding will come from the 2022 CHIPS and Science Act, which earmarks USD 39 billion in direct grants for the semiconductor industry, plus an additional USD 75 billion in loans and loan guarantees. Intel Corp., Taiwan Semiconductor Manufacturing Co. Ltd., and other key industry participants have also recently secured federal funds to enhance their semiconductor infrastructure in the U.S.